Luis Andia (Ph. D)

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Luis Andia received his Engineering Master Degree from ESIEE Paris, France in 2006 and his PhD degree in Microelectronics from the Paris Est University, France, in 2009. 

Dr. Andia is an IEEE senior member and has held a variety of positions with front and back line responsibilities giving him a broad perspective to the challenges associated to the introduction and adoption of disruptive RF and microwave technologies. In 2018 he joined Soitec’s Mobile Communications Division in Singapore where he currently focuses on generating partnerships across the whole value chain from fabless to integrators at leading semiconductor companies and institutions with the mission of addressing today’s and future RF and microwave challenges through specialty RF and microwave technologies.

Massimo Alioto is a Professor at the National University of Singapore, where he leads the Green IC group and the Integrated Circuits and Embedded Systems area. Previously, he held positions at the University of Siena, Intel Labs, University of Michigan Ann Arbor, University of California, Berkeley, and EPFL. He has authored more than 350 publications and six books. Among the others, he is/was the Editor in Chief of the IEEE Transactions on VLSI Systems, Deputy EiC of IEEE JETCAS, Chair of the IEEE CASS Distinguished Lecturer Program, Guest Editor in all major journals in the Solid-State Circuits and Circuits and Systems IEEE societies, and ISSCC TPC member. His group’s research has received several awards such as best paper (e.g., ISSCC, ICECS), and technology highlights from major players in the semiconductor industry (e.g., TSMC, ARM). Prof. Alioto is an IEEE Fellow. 

Kyongjun Yoo received the B.S. degrees in physics from Hanyang University, Seoul, South Korea, in 2010. He received the Ph.D degree in physics from Seoul National University, Seoul, South Korea in 2017. He started his career as a staff engineer in DRAM business department,  SK hynix, Icheon, South Korea. Since 2021, He is currently a staff engineer in Semiconductor R&D Center, Samsung Electronics, Hwaseong, South Korea. He specializes in develping and optimazing DRAM process integration of future node. He has participated in the development of several DRAM products including D1y~D1c node products. His current research interest focuses on disruptive DRAM device including Vertical Channel Transistor(VCT) with new oxide channel material, IGZO.

Tony Tae-Hyoung Kim (Senior Member, IEEE) received the B.S. and M.S. degrees in electrical engineering from Korea University, Seoul, South Korea, in 1999 and 2001, respectively, and the Ph.D. degree in electrical and computer engineering from the University of Minnesota, Minneapolis, MN, USA, in 2009.  From 2001 to 2005, he was with Samsung Electronics, Hwasung, South Korea.  In 2009, he joined Nanyang Technological University, Singapore, where he is currently an Associate Professor.

He has published over 190 papers in journals and conferences and holds 20 U.S. and Korean patents registered. His current research interests include computing-in-memory for machine learning, ultra-low power circuits and systems for smart edge computing, low-power and high-performance digital, mixed-mode, and memory circuit design, variation-tolerant circuits and systems, and emerging memory circuits for neural networks.

Dr. Kim received Distinguished Design Award at A-SSCC2023 Student Design Contest, Best Paper Award (Gold Prize) in IEEE/IEIE ICCE-Asia2021, Korean Federation of Science and Technology (KOFST) Award in 2021, Best Demo Award at APCCAS2016, Low Power Design Contest Award at ISLPED2016, Best Paper Awards at 2014 and 2011 ISOCC, AMD/CICC Student Scholarship Award at IEEE CICC2008, DAC/ISSCC Student Design Contest Award in 2008, Samsung Humantech Thesis Award in 2008, 2001, and 1999, and ETRI Journal Paper of the Year Award in 2005.  He was the Chair of the IEEE Solid-State Circuits Society Singapore Chapter in 2015-2016 and is Chair-Elect/Secretary of the IEEE Circuits and Systems Society VSATC. He has served on numerous IEEE conferences as a Committee Member. He serves as a Corresponding Guest Editor for the IEEE JOURNAL on EMERGING and SELECTED TOPICS in CIRCUITS and SYSTEMS (JETCAS), a Guest Editor for the IEEE TRANSACTIONS on BIOMEDICAL CIRCUITS and SYSTEMS (TBioCAS), an Associate Editor for the IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS and IEEE ACCESS.

Dr. Wenke Weinreich joined Fraunhofer Center Nanoelectronic Technologies for PhD on new high-ks for DRAM in 2006. Since 2011, she worked as a senior scientist at Fraunhofer IPMS in the division CNT and continued the development of new high-k materials as well as their integration in MIM capacitors for memories and passive devices. Since 2016 she headed the group Energy Devices dealing with CMOS integrated Si-capacitors, Li-Ion batteries as well as piezo-, pyro- and thermoelectric energy harvesting and sensor concepts. Since 2019, she was heading the business unit IOT Components & Systems within CNT combining activities like low power sensors, power management, nanopatterning and RF as well as AI processors. Since 2020, she is director of the division CNT which combines three business units Next Generation Computing, Emerging Memory Solutions and IOT Components & Systems as well as a 300 mm cleanroom infrastructure. Since 2021, she is also deputy director of Fraunhofer IPMS and since 2022, head of Center for Advanced CMOS and Heterointegration, Saxony.

Yu Cao received the Ph.D. degree in electrical engineering from University of California, Berkeley, in 2002. He is now the Louis John Schnell Professor of Electrical and Computer Engineering at the University of Minnesota. Before joining UMN, he was a Professor of Electrical Engineering at Arizona State University. He has published numerous articles and three books on nano-CMOS modeling and physical design. His research interests include neural-inspired computing, hardware design for on-chip learning, and reliable integration of nanoelectronics. He is a Fellow of the IEEE.