Dr. Dong-Won Kim is a Fellow of Logic Technology Development, Semiconductor R&D Center, in charge of logic device development for 2nm and beyond 2nm technology node. His research and development has been at the forefront of semiconductor innovation, particularly in nano scaled device, 3 & 1 dimensional CMOS transistors, and 20nm, 14nm, 10nm, 7nm & 3nm technology node for SOC applications. He has authored or coauthored over 110 publications related to nano scale CMOS devices, FinFET, and GAA (Gate All Around) device, also known as MBCFET (Multi-Bridge Channel FET). His pioneering efforts not only propelled the advancement of GAA MBCFET technology but also played a pivotal role in its successful commercialization. His recent research and development interests include 3D stack FET, new channel materials and GAA MBCFET with backside engineering for the next generation logic technology. He is the holder of over 114 U.S. patents, including one of MBCFET origin patent. He served on several IEEE conference technical committees including SOI conference, SNW, VLSI-TSA, IEDM, and ICICDT.
He received the B.S. and M.S. degrees from Korea University, Seoul, Korea in 1987 and 1997, respectively, and the Ph.D. degree at the University of Texas, Austin in 2003.
Dr. Chiao Liu received his PhD in EE from Stanford University. Earlier in his career, he was a Senior Scientist at Canesta Inc. (now part of Microsoft) where he developed the industry first CMOS time-of-flight (ToF) depth sensors. He served as a Technical Fellow at Fairchild Imaging and later BAE Systems Inc, contributed to a wide range of technology breakthroughs in scientific and medical imaging fields. In 2012, he joined Microsoft as a Principal Architect for the Hololens AR project. Currently he is the Director of Research at Meta Reality Labs Research, leading the Sensors and Systems Research team. Dr. Chiao Liu was a member of the IEEE International Electron Devices Meeting (IEDM) technical committee. He also served as guest reviewer for Nature and IEEE Transactions on Electron Devices.
Professor Kiat Seng YEO (M’00–SM’09–F’16) received his B.Eng. (EE) in 1993, and Ph.D. (EE) in 1996 both from Nanyang Technological University (NTU), Singapore. Currently, he is Advisor (Global Partnerships) at Singapore University of Technology and Design (SUTD) and a distinguished professor at Tianjin University. He was Chairman of the University Research Board, Chairman of Graduate Studies, Member of the Academic Council, Associate Provost for Research, Founding Associate Provost for Graduate Studies and Founding Associate Provost for International Relations at SUTD. He has over 30 years of experience in industry, academia, and consultancy. Before joining SUTD, he was full professor at NTU; and spent 13 years in management positions as Associate Chair (Research), Head of Circuits and Systems and Sub-Dean (Students Affairs). Professor Yeo was also a Fellow of the Renaissance Engineering Programme (REP) and served as Senator and Advisory Board Member at NTU. He has made many outstanding contributions to advance Singapore’s education and research ambitions over the course of his career. As the Founding Director of VIRTUS, a S$52 million IC Design Centre of Excellence jointly set up by NTU and Singapore Economic Development Board (EDB), he contributed extensively to the economic development of integrated circuit design in Singapore by leading multidisciplinary research, with a focus on industry collaboration. In 2016, he initiated the FIRST (Fostering Industrial Research Success Together) Industry Workshop at SUTD. Today, it is a flagship event with an attendance of over 1,000 professionals from the industry.
Since 1996, Professor Yeo has been providing consultancy services to statutory boards, local SMEs, and multinational corporations in the areas of electronics and IC design. As Principal Investigator, he secured over SGD70 million in research funding from various funding agencies and industry. He is the author of 13 books, 7 book chapters and has published over 650 top-tier refereed journal and conference papers in his area of research and holds 55 patents, including 2 patents for the world’s smallest integrated transformer, a patent for the world’s smallest integrated filter for 60GHz standard, the inventor of several high Q-factor RF spiral inductors and co-inventor of quite a few novel circuit techniques for 5G/6G wireless communication and RF/mm-wave IC applications.
Professor Yeo is a world-renowned expert in low-power RF/mm-wave integrated circuit design and a recognized expert in CMOS technology. He holds/held positions such as advisor, chair, co-chair, and technical chair at many international conferences. He was awarded the Public Administration Medal (Bronze Award) by the President of the Republic of Singapore on National Day 2009 and was awarded the Nanyang Alumni Achievement Award in 2009 in recognition of his outstanding contributions to the University and society. In 2020, he was conferred the Long Service Medal on National Day by the President of the Republic of Singapore. Currently, Professor Yeo is one of the 6 Academicians elected to both the Singapore Academy of Engineering (SAEng) and the Singapore National Academy of Science (SNAS). He is Fellow of the International Artificial Intelligence Industry Alliance (AIIA), Asia-Pacific Artificial Intelligence Association (AAIA), and IEEE for his contributions to low-power integrated circuit design. Professor Yeo is the World’s AI Top Scientist by AIIA, and the principal author of Integrated Circuit Design Research Ranking for Worldwide Universities 2008 and World University Research Rankings (WURR) 2020. He was recognized among the World’s top 2% of scientists by Stanford University from 2020 to 2023.
Hanming Wu got his PhD degree from the Institute of Mechanics, Chinese Academy of Sciences in 1987. In 2019, he was elected as an academician of the Chinese Academy of Engineering and currently serves as the Dean of the college of Integrated Circuits at Zhejiang University. For a very long period, he has worked in China's IC industry and has made outstanding contributions. He has led and participated in the research and development of China’s VLSI process technology from 0.13-micron to 14-nanometer (seven generations), by which he helped to reduce the technology gap between China and the world's leading level to 3 to 5 years. He supported the development of China's first commercial-standard plasma etching machine with his theoretical models. He created a public platform for IP core technology design, and promoted the co-development of the chip industrial chain. The non-equilibrium low-temperature plasma hybrid model/whole model he established has been adopted as a teaching case by textbooks of world-renowned universities. He served as the chief scientist of the 973 Project, responsible for the research and development of quantum dot memory and magnetic storage technology. He has published 116 papers and holds 67 licensed invention patents. As the principal investigator, he has won 4 times of first prizes at the provincial and ministerial level, including three times of 2nd prizes for national scientific and technological progress. In 2014, he was honored with the title of "Top Ten Outstanding National Science and Technology Workers".
Dr Navab Singh is the Head of Technology Development at the Institute of Microelectronics, A*STAR, Singapore. He started his career in semiconductors as a Lithography Process Engineer in 1996 after graduating with a Master of Technology degree in Solid State Materials from the Indian Institute of Technology Delhi, India. Since then, Dr Singh has worked on advancing specialty technologies to new frontiers in the fields of wide bandgap semiconductors, sensors & actuators, photonics, and heterogeneous integration. He obtained his PhD degree with work in Computer and Electrical Engineering from the National University of Singapore in 2008. He has authored or coauthored about 300 publications and holds an h-index of 48. Dr Singh is a recipient of the George E. Smith Award 2007 and the Singapore National Technology Award 2008, for his pioneer work on nanowire gate-all-around transistors. He was also presented with the TALENT award 2010 by A*STAR for Leading, Educating and Nurturing Talents at IME.
Dr. Christopher Nguyen is the CEO and Co-Founder of Aitomatic, a Silicon Valley leader in Industrial GenAI. Dr. Nguyen is the leader of the SemiKong project, the world's first open-source large language model for semiconductors, and co-leads the Foundation Models Focus Area in the AI Alliance. Previously, he shaped Panasonic's global Industrial AI direction as President & CEO of Arimo-Panasonic and was Google's first Engineering Director, spearheading the development of Google Apps/Gmail for millions worldwide.
As a professor at HKUST, he co-founded the Computer Engineering Program and advanced tech education. A leading figure in open-source contributions, his other notable projects include Human-First AI, and OpenSSA (Agentic AI Framework). Dr. Nguyen holds a BS from U.C. Berkeley, an MS & PhD from Stanford University in High-Performance Quasi-SOI BiCMOS Transistors.
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